Intel 45nm Penryn-based Xeon unveiled at IDF
Wednesday 19th September 2007, 10:10:00 AM, written by Rys
The first peak at Intel's 45nm Penryn processor technology came
yesterday at IDF, as Intel took the wraps off of Harpertown, a full
Penryn implementation in Xeon form.
Penryn is the 2nd tick of Intel's two-step architecture/process direction, which started with the Merom architecture, which most will know as Core 2 Duo or Core 2 Quad on the desktop, and 65nm.
Penryn's architecture enhancements over Merom include: a new divider block, tweaked square root implementation, SSE4 instructions, and a tweaked and larger cache setup (12MiB L2 per socket potentially, 6MiB shared for each core pair). All are destined for desktop Penryn implementations too.
Harpertown Xeons ride the fastest quad-pumped GTL+ buses (one per socket) yet seen, with the top models riding a 1600MHz effective bus at speeds of up to 3GHz, signalling the use of half multipliers for the first time with Xeon processors since the Pentium III-based models.
Harpertown processors squeeze all that dual-core processor logic and prodigious amount of L2 cache into 410M transistors in a 107mm squared area per die (with two dice in a package). At 820M transistors and 214mm squared, the area benefits of manufacturing the processors on 45nm are clear.
So that's Penryn's first implementation in a nutshell. Launched yesterday at IDF, HEXUS have an at-IDF hands-on look, and The Tech Report and 2CPU.com have in-house analysis.
All three take a look at Stoakley, the 2S server platform that Harpertown slots into, which still makes use of power- and performance-sucking FB-DIMM, and The Tech Report manage to compare directly to AMD Barcelona too.
There's lots to absorb, so if you haven't started the reading process, those three links above will get you knowledgeable about the first 45nm processors from Intel.
Penryn is the 2nd tick of Intel's two-step architecture/process direction, which started with the Merom architecture, which most will know as Core 2 Duo or Core 2 Quad on the desktop, and 65nm.
Penryn's architecture enhancements over Merom include: a new divider block, tweaked square root implementation, SSE4 instructions, and a tweaked and larger cache setup (12MiB L2 per socket potentially, 6MiB shared for each core pair). All are destined for desktop Penryn implementations too.
Harpertown Xeons ride the fastest quad-pumped GTL+ buses (one per socket) yet seen, with the top models riding a 1600MHz effective bus at speeds of up to 3GHz, signalling the use of half multipliers for the first time with Xeon processors since the Pentium III-based models.
Harpertown processors squeeze all that dual-core processor logic and prodigious amount of L2 cache into 410M transistors in a 107mm squared area per die (with two dice in a package). At 820M transistors and 214mm squared, the area benefits of manufacturing the processors on 45nm are clear.
So that's Penryn's first implementation in a nutshell. Launched yesterday at IDF, HEXUS have an at-IDF hands-on look, and The Tech Report and 2CPU.com have in-house analysis.
All three take a look at Stoakley, the 2S server platform that Harpertown slots into, which still makes use of power- and performance-sucking FB-DIMM, and The Tech Report manage to compare directly to AMD Barcelona too.
There's lots to absorb, so if you haven't started the reading process, those three links above will get you knowledgeable about the first 45nm processors from Intel.
Tagging
intel ± penryn, 45nm, harpertown, xeon
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