The Technology of a 3D Engine - Part Two
In this part of the article series, Roderic talks about scene management and its specific implementation in his engine technology. What he describes is an elegant optimised implementation of understood techniques, pulling together ideas and their application using accessible design patterns, to make them easy to consume in code.
At last month's International Supercomputing Conference in Dresden, NASA presented the results of an internal study exploring the suitability of the Cell BE architecture towards accelerating key aspects of climate modeling.
This week, the world of computing officially entered the petaflop era with the announcement that the Los Alamos National Laboratory's 'Roadrunner' had become the first supercomputer in history to cross the psychologically significant threshold of a thousand-trillion calculations per second...
AMD has finally released the Phenom X3 outside of the OEM market, with reviews already available at all major hardware websites, including The Tech Report. But is it good?
IBM announced Monday that the semiconductor research alliance led by the firm had successfully demonstrated significant process advancement through the incorporation of high-k/metal gate (HKMG) in test silicon at its East Fishkill fab. Anticipated originally for the 45nm node...
David Kanter at Real World Technologies just published his usual brand of excellent architecture analysis for Intel's upcoming Nehalem processor - there aren't many changes, but it's still well worth the read. At the same time, DT says an A1 Nehalem system at IDF is running at an impressive 3.2GHz.
All the Silverthorne information you'll ever want is now available in articles from The Tech Report and AnandTech - but while the coverage is decent in terms of architecture, they both miss the mark completely in terms of market dynamics. And in other news, Montalvo looks like it's in big…
If Intel isn't your bag, you should probably take a look at the new B3-based brains behind Spider, the AMD enthusiast platform. These new Phenoms, when paired with a nice 790FX mainboard and one or two HD 3xxx Radeons, means that Spider doesn't look half bad for the gamer.
AMD displayed wafers of its 45nm Shanghai chip at CeBit, and Hans de Vries took the opportunity to create a comparison picture between Shanghai and Nehalem. Surprisingly, their die size is just about identical, so AMD doesn't have the previously expected die size advantage. Or do they? Fudzilla claims that…
It might have felt as if VIA’s CPU designers were sleeping for the last 3 years and asked the package and PCB engineers to keep the company going for the next thousand years. But today, they prove nothing could be further away from the truth.
There remains a significant amount of confusion on the derivatives based on Intel's upcoming Nehalem microarchitecture. A week ago, PC Watch released an article in Japanese on upcoming sockets and CPUs, but it didn't collide perfect with previous rumours and many websites reporting on the news seemed, at best, horribly…
You'd think a new, cheaper quad-core from Intel would be bad news for AMD. However, it turns out that Intel is going so soft on pricing and performance that this might actually turn out to be good news for AMD compared to most alternative scenarios.
IBM today made formal the announcement of an HPC-targeted variant of the Cell B.E. processor, given the name PowerXCell 8i. Featuring re-engineered SPEs with enhanced dual-precision performance and improved memory addressability, the processor is capable of ~102 DP GFlops and support for up to...
It's official: the iPhone's future CPU will have a TDP of 25W! Or so mindlessly speculate Forbes and a variety of other websites following Apple's stunning acquisition of P.A. Semi, a manufacturer of power-efficient PowerPC-based CPUs. [UPDATED 4X]
Introduced by Toshiba last September, the Cell-based SpursEngine co-processor has begun shipment in the form of a single lane PCI Express add-in board.
VIA released a new single-chip chipset for the Ultra Mobile market on April 1st - it sports a DX9 IGP, a 64-bit DDR2 memory controller and the usual I/O capabilities. TDP is 3.5 to 5W, and the specs hint at why VIA is interested in NVIDIA's MCP79. In related news, VIA's had decent sales in March...
Rumours are swirling around the web that NVIDIA's upcoming MCP79 chipset will be compatible with VIA's Isaiah processor. The deal makes perfect sense, so the real question is: will MCP79 or MCP78 also be compatible with Montalvo's upcoming processor? Meanwhile, Intel's G45/P45 seem to be delayed...
EETimes published a nice piece on what media coverage got wrong regarding Intel's new Atom platform (based on Silverthorne) earlier, it's well worth a read - but other points may also be worth discussing, from Intel's roadmap to others benefiting such as Imagination Technologies (PowerVR) and Icera.
IBM introduced the 45nm version of the Cell B.E. processor at ISSCC
earlier this week, fabbed on IBM's 45nm SOI line at East Fishkill and
targeted primarily towards future revisions of the Playstation 3 gaming
console and Cell blade servers.
According to Digitimes, AMD is slated to introduce a new dual-core CPU family based on the Barcelona architecture in late Q2. These products will presumably be based on the previously rumoured Kuma core with 1MiB of L2 and 2MiB of L3.
AMD finally release the first few quad-core Phenoms a couple of days ago to a more than lukewarm reception, aggressive execution and pricing by Intel taking the wind out of the X4 sails.

